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IS42S16400B1 Datasheet PDF - Integrated Silicon Solution

Part NameDescriptionManufacturer
IS42S16400B1 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM ISSI
Integrated Silicon Solution ISSI
Other PDF  no available.
IS42S16400B1 Datasheet PDF : IS42S16400B1 pdf   
IS42S16400B1 image

OVERVIEW
ISSIs 64Mb Synchronous DRAM IS42S16400B1 is organized as 1,048,576 bits x 16-bit x 4-bank for improved performance.The synchronous DRAMs achieve high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.

FEATURES
• Clock frequency: 133 MHz
• Fully synchronous; all signals referenced to a positive clock edge
• Internal bank for hiding row access/precharge
• Single 3.3V power supply
• LVTTL interface
• Programmable burst length – (1, 2, 4, 8, full page)
• Programmable burst sequence: Sequential/Interleave
• Self refresh modes
• 4096 refresh cycles every 64 ms
• Random column address every clock cycle
• Programmable CAS latency (2, 3 clocks)
• Burst read/write and burst read/single write operations capability
• Burst termination by burst stop and precharge command
• Byte controlled by LDQM and UDQM
• Package: 400-mil 54-pin TSOP II

 

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