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AMD
Advanced Micro Devices
Description : Physical Layer 10-Bit Transceiver for Gigabit Ethernet (GigaPHY™-SD)

GENERAL DESCRIPTION
The Am79761 Gigabit Ethernet Physical Layer Serializer/Deserializer (GigaPHY-SD) device is a 1.25 Gbps Ethernet Transceiver optimized for Gigabit Ethernet/ 1000BASE-X applications. It implements the Physical Medium Attachment (PMA) Layer for a single port.
The GigaPHY-SD device can interface to fiber-optic media to support 1000BASE-LX and 1000BASE-SX applications and can interface to copper coax to support 1000BASE-CX applications.

DISTINCTIVE CHARACTERISTICS
Gigabit Ethernet Transceiver operates at 1.25 Gigabits per second (Gbps)
■ Suitable for both Coaxial and Optical Link applications
10-Bit TTL Interface for Transmit and Receive Data
■ Monolithic Clock Synthesis and Clock Recovery requires no external components
■ Word Synchronization Function (Comma Detect)
■ Low Power Operation - 700 mW typical
■ 64-pin Standard PQFP
   — 14 x 14 mm (0˚ C - 70˚ C)
   — 10 x 10 mm (0˚ C - 50˚ C)
■ 125 MHz TTL Reference Clock
■ Loopback Diagnostic
■ Single +3.3 V Supply

Davicom
Davicom Semiconductor, Inc.
Description : 10/100Mbps Ethernet Physical Layer Single Chip Transceiver

General Description
The DM9101 is a Physical-Layer, single-chip, low-power Transceiver for 100Base-TX, and 10Base-T operations. On the media side, it provides a direct interface either to Unshielded Twisted Pair Category 5 Cable (UTP5) for 100Base-TX Fast Ethernet, or UTP5/UTP3 Cable for 10Base-T Ethernet. Through the IEEE 802.3u Media Independent Interface (MII), the DM9101 connects to the Medium Access Control (MAC) Layer, ensuring a high inter operability among products from different vendors.

Features
• 10/100Base-TX Physical-Layer, single-chip Transceiver
• Compliant with IEEE 802.3u 100Base-TX standard
• Compliant with ANSI X3T12 TP-PMD 1995 standard
• Compliant with IEEE 802.3u Auto-negotiation protocol for automatic link type selection
• Supports the MII with serial management interface
• Supports Full Duplex operation for 10 and 100Mbps
• High performance 100Mbps clock generator and data recovery circuitry
• Adaptive equalization circuitry for 100Mbps receiver
• Controlled output edge rates in 100Mbps
• Supports a 10Base-T interface without the need for an external filter
• Provides Loop-back mode for system diagnostics
• Includes Flexible LED configuration capability
• Digital clock recovery circuit using advanced digital algorithm to reduce jitter
• Low-power, high-performance CMOS process
• Available in both a 100 pin LQFP and a 100 QFP package

Part Name(s) : DM9161A DM9161AE
ETC1
Unspecified
Description : 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver

[DAVICOM]

General Description
The DM9161A is a Physical Layer, single-chip, and low power Transceiver for 100BASE-TX and 10BASE-T operations. On the media side, it provides a direct interface either to Unshielded Twisted Pair Category 5 Cable (UTP5) for 100BASE-TX Fast Ethernet, or UTP5/UTP3 Cable for 10BASE-T Ethernet. Through the Media Independent Interface (MII), the DM9161A connects to the Medium Access Control (MAC) Layer, ensuring a high inter operability from different vendors.

Features
■ Fully comply with IEEE 802.3 / IEEE 802.3u 10Base-T/ 100Base-TX, ANSI X3T12 TP-PMD 1995 standard
■ Support MDI/MDI-X auto crossover function (Auto-MDI)
■ Support Auto-Negotiation function, compliant with IEEE 802.3u
■ Fully integrated Physical Layer Transceiver On-chip filtering with direct interface to magnetic transformer
■ Selectable repeater or node mode
■ Selectable MII or RMII (Reduced MII) mode for 100Base-TX and 10Base-TX. Selectable MII or GPSI (7-Wired) mode for 10Base-T
■ Selectable full-duplex or half-duplex operation
■ MII management interface with maskable interrupt output capability
■ Provide Loopback mode for easy system diagnostics
■ LED status outputs indicate Link/ Activity, Speed10/100 and Full-duplex/Collision. Support Dual-LED optional control
■ Single low power Supply of 3.3V with an advanced CMOS technology
■ Very Low Power consumption modes:
    ● Power Reduced mode (cable detection)
    ● Power Down mode
    ● Selectable TX drivers for 1:1 or 1.25:1 transformers for additional power reduction. 1: 1 transformers only when Auto MDIX Enable .
■ Compatible with 3.3V and 5.0V tolerant I/Os
■ 48-pin LQFP

Part Name(s) : DM9161B DM9161BEP
Davicom
Davicom Semiconductor, Inc.
Description : 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver

General Description
DAVICOM’s DM9161B is a Physical Layer, single-chip, and low power 100BASE-TX/10BASE-T Transceiver specifically designed for consumer electronics, industrial and enterprise applications. for the media usage, it provides a direct interface either to Unshielded Twisted Pair Category 5 Cable (UTP5) for 100BASE-TX Fast Ethernet, or UTP5/UTP3 Cable for 10BASE-T Ethernet.
Through the Media Independent Interface (MII), DM9161B not only connects the Medium Access
Control (MAC) Layer but also ensur a high inter operability from different vendors.

Features
Fully comply with IEEE 802.3 / IEEE 802.3u 10Base-T/100Base-TX, ANSI X3T12 TP-PMD 1995 standard
Support HP MDI/MDI-X auto crossover function(HP Auto-MDIX)
Support Auto-Negotiation function, compliant with IEEE 802.3u
Fully integrated Physical Layer Transceiver On-chip iltering with direct interface to magnetic transformer
Selectable repeater or node mode
Selectable MII or RMII (Reduced MII) mode for 100Base-TX and 10Base-TX. Selectable MII or GPSI
(7-Wired) mode for 10Base-T
Selectable full-duplex or half-duplex operation
MII management interface with maskable interrupt output capability
Provide Loopback mode for easy system diagnostics
LED status outputs indicate Link/ Activity, Speed10/100 and Full-duplex/Collision. Support Dual-LED optional control
Single low power Supply of 3.3V with an advanced CMOS technology
Lower Power consumption modes:
●Power Reduced mode (cable detection)
●Power Down mode
●Selectable TX drivers for 1:1 or 1.25:1 transformers for additional power reduction. 1: 1 transformers only when HP Auto-MDIX Enable.
Compatible with 3.3V and 5.0V tolerant I/Os
Pin to pin Compatible with DM9161A.
DSP architecture PHY Transceiver.
48-pin LQFP 0.18um process

Davicom
Davicom Semiconductor, Inc.
Description : 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver

General Description
The DM9161A is a Physical Layer, single-chip, and low power Transceiver for 100BASE-TX and 10BASE-T operations. On the media side, it provides a direct interface either to Unshielded Twisted Pair Category 5 Cable (UTP5) for 100BASE-TX Fast Ethernet, or UTP5/UTP3 Cable for 10BASE-T Ethernet. Through the Media Independent Interface (MII), the DM9161A connects to the Medium Access Control (MAC) Layer, ensuring a high inter operability from different vendors.

Features
■ Fully comply with IEEE 802.3 / IEEE 802.3u 10Base-T/ 100Base-TX, ANSI X3T12 TP-PMD 1995 standard
■ Support MDI/MDI-X auto crossover function (Auto-MDI)
■ Support Auto-Negotiation function, compliant with IEEE 802.3u
■ Fully integrated Physical Layer Transceiver On-chip filtering with direct interface to magnetic transformer
■ Selectable repeater or node mode
■ Selectable MII or RMII (Reduced MII) mode for 100Base-TX and 10Base-TX. Selectable MII or GPSI (7-Wired) mode for 10Base-T
■ Selectable full-duplex or half-duplex operation
■ MII management interface with maskable interrupt output capability
■ Provide Loopback mode for easy system diagnostics
■ LED status outputs indicate Link/ Activity, Speed10/100 and Full-duplex/Collision. Support Dual-LED optional control
■ Single low power Supply of 3.3V with an advanced CMOS technology
■ Very Low Power consumption modes:
    ● Power Reduced mode (cable detection)
    ● Power Down mode
    ● Selectable TX drivers for 1:1 or 1.25:1 transformers for additional power reduction. 1: 1 transformers only when HP Auto-MDIX Enable .
■ Compatible with 3.3V and 5.0V tolerant I/Os
■ 48-pin LQFP

AMD
Advanced Micro Devices
Description : NetPHY™ -1 10/100 Mbps Ethernet Physical Layer Single-Chip Transceiver with 100BASE-FX Support

GENERAL DESCRIPTION
The NetPHY-1 device is a Physical-Layer, single-chip, low-power Transceiver for 100BASE-TX, 100BASE-FX, and 10BASE-T operations. On the media side, it provides a direct interface to Fiber Media for 100BASE-FX Fast Ethernet, Unshielded Twisted Pair Category 5 Cable (UTP5) for 100BASE-TX Fast Ethernet, or UTP5/UTP3 Cable for 10BASE-T Ethernet. Through the IEEE 802.3u Media Independent Interface (MII), the NetPHY-1 device connects to the Medium Access Control (MAC) Layer, ensuring a high interoperability among products from different vendors.
The NetPHY-1 device uses a low-power, high-performance CMOS process. It contains the entire Physical Layer functions of 100BASE-FX and 100BASE-TX as defined by the IEEE 802.3u standard, including the Physical Coding SubLayer (PCS), Physical Medium Attachment (PMA), 100BASE-TX Twisted Pair Physical Medium Dependent (TP-PMD) subLayer, and a 10BASE-T Encoder/Decoder (ENDEC). The NetPHY-1 device provides strong support for the Auto-Negotiation function utilizing automatic media speed and protocol selection. The NetPHY-1 device incorporates an internal wave-shaping filter to control rise/fall time, eliminating the need for external filtering on the 10/100 Mbps signals.

DISTINCTIVE CHARACTERISTICS
■ 100BASE-FX direct interface to industry
   standard electrical/optical Transceivers
■ 10/100BASE-TX Physical-Layer, single-chip  Transceiver
■ Compliant with the IEEE 802.3u 100BASE-TX  standard
■ Compliant with the ANSI X3T12 TP-PMD 1995  standard
■ Compliant with the IEEE 802.3u Auto
   Negotiation protocol for automatic link type  selection
■ Supports the MII with serial management  interface
■ Supports Full Duplex operation for 10 Mbps and  100 Mbps
■ High performance 100 Mbps clock generator
   and data recovery circuitry
■ Adaptive equalization circuitry for 100 Mbps  receiver
■ Controlled output edge rates in 100 Mbps
■ Supports a 10BASE-T interface without the
   need for an external filter
■ Provides Loopback mode for system  diagnostics
■ Includes flexible LED configuration capability
■ Digital clock recovery circuit using advanced
   digital algorithm to reduce jitter
■ Low-power, high-performance CMOS process
■ Available in  a 100-pin PQFP package

Davicom
Davicom Semiconductor, Inc.
Description : 10/100 Mbps Fast Ethernet Physical Layer TX/FX Single Chip Transceiver

General Description
The DM9161 is a Physical Layer, single-chip, and low power Transceiver for 100BASE-TX 100BASE-FX and 10BASE-T operations. On the media side, it provides a direct interface either to Unshielded Twisted Pair Category 5 Cable (UTP5) for 100BASE-TX Fast Ethernet, or UTP5/UTP3 Cable for 10BASE-T Ethernet. Through the Media Independent Interface(MII), the DM9161 connects to the Medium Access Control (MAC) Layer, ensuring a high inter-operability from different vendors.

Features
Fully complies with IEEE 802.3u 10Base-T/100Base-TX/FX
Support Auto-Negotiation function, compliant with IEEE 802.3u
Fully integrated Physical Layer single chip with direct interface to magnetic
Integrated 10Base-T and 100Base-TX Transceiver
Selectable repeater or node mode
Far end fault signaling option in FX mode
Selectable MII or RMII (Reduced MII) interface, at he 100BASE-TX
Selectable GPSI (7-Wired) or MII mode at the 10Base-T.
Selectable twisted-pair or fiber mode output
Selectable full-duplex or half-duplex operation
MII management interface with maskable interrupt output capability
Provide Loopback mode for easy system diagnostics
LED status outputs indicate Link/ Activity, Speed10/100 and Full-duplex/Collision.
Single low power Supply of 3.3V with 0.35µm CMOS technology
Very Low Power consumption modes:
●Power Reduced mode (cable detection)
●Power Down mode
●Selectable TX drivers for 1:1 or 1.25:1 transformers for additional power reduction.
Compatible with 3.3V and 5.0V tolerant I/Os
48-pin LQFP small package (1x1 cm)

Part Name(s) : DM9161BI DM9161BIEP
Davicom
Davicom Semiconductor, Inc.
Description : Industry-grade 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver

General Description
The DM9161BI is a Industrial-grade Physical Layer, single-chip, and low power Transceiver for
100BASE-TX and 10BASE-T operations. On the media side, it provides a direct interface either to
Unshielded Twisted Pair Category 5 Cable (UTP5) for 100BASE-TX Fast Ethernet, or UTP5/UTP3 Cable for 10BASE-T Ethernet. Through the Media Independent Interface (MII), the DM9161BI connects to the Medium Access Control (MAC) Layer, ensuring a high inter operability from different vendors.

Features
Fully comply with IEEE 802.3 / IEEE 802.3u 10Base-T/100Base-TX, ANSI X3T12 TP-PMD 1995 standard
Support HP MDI/MDI-X auto crossover function(HP Auto-MDIX)
Support Auto-Negotiation function, compliant with IEEE 802.3u
Fully integrated Physical Layer Transceiver On-chip filtering with direct interface to magnetic transformer
Selectable repeater or node mode
Selectable MII or RMII (Reduced MII) mode for 100Base-TX and 10Base-TX. Selectable MII or GPSI
(7-Wired) mode for 10Base-T
Selectable full-duplex or half-duplex operation
MII management interface with mask able interrupt output capability
Provide Loopback mode for easy system diagnostics
LED status outputs indicate Link/ Activity, Speed10/100 and Full-duplex/Collision. Support Dual-LED optional control
Single low power Supply of 3.3V with an advanced CMOS technology
Very Low Power consumption modes:
●Power Reduced mode (cable detection)
●Power Down mode
●Selectable TX drivers for 1:1 or 1.25:1 transformers for additional power reduction. 1: 1 transformers only when HP Auto-MDIX Enable.
Compatible with 3.3V and 5.0V tolerant I/Os
Pin to pin Compatible with DM9161A.
DSP architecture PHY Transceiver.
Supports Industrial-grade: -40°C.~ +85'°C,
48-pin LQFP 0.18um process

Broadcom
Broadcom Corporation
Description : 24-PORT Gigabit Ethernet MULTILayer SWITCH WITH TWO 10-Gigabit Ethernet/HIGIG+™ PORTS

24-PORT Gigabit Ethernet MULTILayer SWITCH WITH TWO 10-Gigabit Ethernet/HIGIG+™ PORTS

Part Name(s) : HDMP-1636 HDMP-1646
HP
HP => Agilent Technologies
Description : Gigabit Ethernet Transceiver Chip

Description
The HDMP-1636/46 Transceiver is a single silicon bipolar integrated circuit packaged in a plastic QFP package. It provides a low-cost, low-power Physical Layer solution for 1250 MBd Gigabit Ethernet or proprietary link interfaces. It Gigabit Ethernet Transceiver Chip Preliminary Technical Data provides complete Serialize/ Deserialize for copper transmission, incorporating both the Gigabit Ethernet transmit and receive functions into a single device.

Features
• IEEE 802.3z Gbit Ethernet Compatible, Supports 1250 MBd Gigabit Ethernet
• Based on X3T11 “10 Bit Specification”
• Low Power Consumption
• Transmitter and Receiver Functions Incorporated onto a Single IC
• Two Package Sizes Available:
   – 10 mm PQFP (HDMP-1636)
   – 14 mm PQFP (HDMP-1646)
10-Bit Wide Parallel TTL Compatible I/Os
• Single +3.3 V Power Supply
• 5-Volt Tolerant I/Os
• 2 KV ESD Protection

Applications
• 1250 MBd Gigabit Ethernet Interface
• High Speed Proprietary Interface
• Backplane Serialization
• Bus Extender

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